An Introduction to Semiconductor Reliability

As increasing investments are made in VLSI technology and development, it becomes essential that semiconductor processes and IC designs have reliability issues addressed prior to volume manufacturing. Ideally, reliability issues would be addressed and corrected during the design process. This tutorial provides the motivation for understanding semiconductor reliability issues, a basic review of reliability wearout mechanisms, and how process technologies such as Cu interconnects and low-K dielectrics influence reliability design guidelines. This tutorial will provide the foundation to allow you to build technical depth in the areas of specific interest throughout the rest of the symposium.

Vijay Reddy

Vijay Reddy is a Member of the Group Technical Staff at Texas Instruments, Dallas, TX. He received his Ph.D. in electrical engineering in 1994 from the UT Austin. He joined TI in 1994 and has worked on dielectric reliability, ESD, Latch-up, plasma charging, transistor reliability, and mobile ion testing of logic and DRAM technologies. Since 1998 he has focused on transistor and circuit reliability in sub-0.13um logic and embedded memory technologies. More recently his activities have also included product reliability and qualification methodologies. He has published more than 20 papers and has several patents filed. He has served as the Chair of the Device and Process Committee of the 2003 IRPS and has presented tutorials on CMOS Reliability at IRPS.