ESD & Latchup in Advanced Technologies

Steven H. Voldman, IEEE Fellow
IBM Microelectronics

121-1: Latchup: In this presentation, the fundamentals of latchup to modern latchup issues will be discussed. The curriculum will include latchup physics, test structures, characterization, process and technology issues, and new latchup issues in the industry today.

121-2: ESD: In this presentation the fundamentals of ESD will be introduced. Background is first given on ESD physics, electro-thermal and statistical models. This is followed by ESD devices, circuits, and process issues in CMOS, silicon on insulator and silicon germanium technology.

Steven H. Voldman is an ESD/Latchup engineer/scientist in IBM's RF Silicon Germanium development team. He received his B.S. in Eng. Science from the Univ. of Buffalo (1979); M.S. EE (1981) and Electrical Engineer Degree (1982) from MIT; MS Eng. Physics (1986) and Ph.D EE (1991) from the Univ. of Vermont under IBM's Resident Study Fellow program. As a reliability/device engineer since 1982, his work involved bipolar and CMOS SRAM SER, MOSFET GIDL, hot electron, epitaxy/well design, CMOS latchup, and ESD. He has authored ESD and latchup publications in the area of MOSFET scaling, device simulation, Cu, low-k, MR heads, CMOS, SOI, SiGe and SiGeC technology and recently authored an article in the Oct. 2002 Scientific American. He was responsible for defining the IBM ESD/latchup strategy for CMOS, BiCMOS and RF CMOS from 1986 to 2004. Voldman served as SEMATECH ESD Chair (1996-2000), EOS/ESD TPC, Vice Chair, and General Chair (2002); and presently serving as the IRPS ESD/Latchup Chairman (2003, 2004), EOS/ESD 2003 Past General Chairman, ESD Assoc. Board of Directors, ESD TLP Work Group Standards Chairman, ESD Education Committee, IPFA Tech. Program Steering Committee, ISQED Committee, and Taiwan Electrostatic Discharge Conference Technical Program Committee as well as providing ESD and latchup tutorials for the IRPS, IPFA and ESD Symposium. Voldman has provided ESD lectures for universities for the MIT Lecture Series, and Taiwan National Chiao-Tung University graduate student seminar, and provided the first Keynote address for the NCTU Taiwan ESD Conference 2003. He is a recipient of the ESD Best Paper (1995), ESD Best Presentation (1997), the IBM 42nd Plateau Invention Achievement Award, his 120th issued US patents, over 100 publications, and recently accepted the first IEEE Fellow in ESD phenomenon field for "contributions to electrostatic discharge protection in CMOS, SOI and SiGe technologies" at the IRPS 2003 in Dallas, Texas. Additionally, he has been recently highlighted in EE Times Times People, Pour La Science and Intellectual Property Law and Business.