ESD Protection Design in CMOS

Timothy J. Maloney, Ph.D.
Intel Corporation
SC12-607, 2200 Mission College Blvd.
Santa Clara, CA 95052

Every CMOS integrated circuit has a power supply and every power supply, large or small, is vulnerable to ESD events, depending on which pins are zapped. In nearly every case of ESD stress, a power supply is involved somehow. Design methods for CMOS power supply protection are described in this tutorial, from the point of view of the design engineer who wants to build up a comprehensive library as part of a coherent ESD design program. This will include design for higher-than-normal power supply voltage, design for low standby current, new designs for advanced technology, and other topics. We will also address some design principles related to charged device model (CDM) ESD protection, including some issues involved with oxide stress and metal heating.

Timothy J. Maloney received an S.B. degree in physics from the Massachusetts Institute of Technology in 1971, an M.S. in physics from Cornell University in 1973, and a Ph.D. in electrical engineering from Cornell in 1976, where he was a National Science Foundation Fellow. He was a Postdoctoral Associate at Cornell until 1977, when he joined the Central Research Laboratory of Varian Associates, Palo Alto, CA. At Varian until 1984, he worked on III-V semiconductor photocathodes, solar cells and microwave devices, as well as silicon molecular beam epitaxy and MOS process technology. Since 1984 he has been with Intel Corp., Santa Clara, CA, where he has been concerned with integrated circuit ESD protection, CMOS latchup testing, fab process reliability, signal integrity, and design and testing of standard IC layouts. He is now a Senior Principal Engineer at Intel. He has received the Intel Achievement Award for his patented ESD protection devices, which have achieved breakthrough ESD performance enhancements for a wide variety of Intel products. He now holds twenty-one patents, with several more pending. Dr. Maloney received Best Paper Awards for his contributions to the EOS/ESD Symposium in 1986 and 1990, was General Chairman for the 1992 EOS/ESD Symposium, and received the ESD Association's Outstanding Contributions Award in 1995. He has taught short courses at UCLA, University of Wisconsin, and UC Berkeley. He is co-author of a book, "Basic ESD and I/O Design" (Wiley, 1998), and is a Senior Member of the IEEE.