Future Directions and Challenges for Flash Memory Scaling

Flash memory is now the fastest growing memory segment driven by the rapid growth of portable devices such as digital cameras and cellular phones. Flash memory cell scaling is more challenging than logic transistor scaling due to the high operating voltages (~10V for NOR flash and ~20V for NAND flash). In this tutorial, the challenges to flash memory scaling, as well as some of the improvement areas to enable further scaling, will be discussed. It is projected that Moore's law will continue for the rest of this decades and the main stream NOR and NAND technologies will be the volume flash technologies. Beyond that, there are many ideas of new non-volatile memories based on new materials. We will examine some of the new non-volatile memory technologies and discuss the key challenge and opportunities.

Gregory E. Atwood is an Intel Fellow, Technology and Manufacturing Group and Director of Communication Technology Development, where he is responsible for the definition of next generation technologies in support of the Flash Memory, Cellular Communication, and Handheld Product business units. Atwood joined Intel in 1979 as a device physicist and has since been involved in the development of a wide variety of silicon process technologies including volatile and non-volatile memory technologies (Flash, EPROM, E2PROM, SRAM), as well as microprocessor technologies. He holds over 30 patents. Atwood was born in Kansas City, Kan., and graduated from Purdue University with a master's degree in Physics.

Stefan K. Lai Vice President, Technology and Manufacturing Group Director, California Technology and Manufacturing INTEL CORPORATION Stefan K. Lai is Vice President, Technology and Manufacturing Group, and Director, California Technology and Manufacturing. Lai is responsible for the development of silicon process technologies for devices used in communications products, including flash, flash + logic, analog and novel memory technologies. Lai joined Intel in 1982 as Program Manager for scalable E2PROM components. He co-invented the EPROM tunnel oxide (ETOX) flash memory cell, which has become an industry standard. Lai started the flash memory development team in 1983, and has managed almost every generation of flash memory development at Intel. He was promoted to Director of flash memory development in 1994. In 2000, Lai's charter was expanded to include process technologies for Intel's Wireless Communications & Computing Group and Networking Communications Group, responsible for evaluation and development of advanced process technologies most suited for manufacturing of communication and network products. Previously, Lai was Member of Technical Staff at the IBM Yorktown TJ Watson Research Center from 1979 to 1982. Lai has written numerous technical papers on the physics of silicon-silicon dioxide interface, as well as flash memory technologies and future trends. He holds four patents. He co-authored chapters on non-volatile memories, and has taught at the International Electron Devices Meeting (IEDM), the premier technical conference for semiconductor engineers and scientists. Lai was recognized as an IEEE Fellow in 1998 for his research on the properties of silicon MOS interfaces and the development of flash EPROM memory. Lai received a bachelor of science degree in applied physics from the California Institute of Technology in 1973, and his Ph.D. in applied quantum physics from Yale University in 1979.