Oxide breakdown in CMOS devices and circuits

The breakdown of gate oxide has been a perennial concern, and for highly scaled ultra-thin gate oxide the reliability margin appears worrisomely small. However, the last few years have seen some new physical understanding of the breakdown process, and renewed attention to the real effect of oxide breakdown on circuit performance, which may permit an improved reliability outlook. This tutorial will review oxide reliability projections and discuss new concepts such as progressive breakdown and implications for circuits.

James H. Stathis
J.H. Stathis received the bachelor’s in physics (Summa Cum Laude) from Washington University in St. Louis (1980), and the Ph.D. in physics from the MIT (1986), joining the IBM Research Division the same year. The focus of his work at IBM has been the electrical properties of point defects in SiO2, including basic studies of defect structure using magnetic resonance and electrical measurement techniques, and the role of defects in wearout and breakdown. He is the author of more than 75 research papers and over 40 invited talks. Jim gave tutorials at IRPS and ESREF in 2003, and served as Chair of the dielectrics sub-committee for the 2003 IRPS in Dallas.