Ultra-thin Oxide Reliability

It is widely believed that gate oxide reliability margin shrinks significantly as oxide thickness is continuously reduced to meet technology performance requirement. This challenge in turn has stimulated much research work in the last decade, which has led to new physical understanding of the oxide breakdown process and its real impact on circuit operation. In this tutorial, we will summarize the current experimental status of ultra-thin gate oxide reliability and critically examine many different breakdown models. In particular, we will discuss new breakdown models such as the power-law breakdown model and its implications on ultra-thin oxide projections. To extend gate oxide reliability further beyond current projections, we will review the post-breakdown phenomenology and methodologies, which will be crucial to maximize the reliability potential of ultra-thin gate oxide in a realistic circuit environment.

Ernest Y. Wu

Ernest Y. Wu is a senior engineer in Technology Reliability Department at Semiconductor Research and Development Center (SRDC) in IBM System and Technology Group. He received M.S. and Ph.D. degrees in physics from University of Kansas in 1986 and 1989, respectively. Dr. Wu joined the IBM Microelectronics Division in 1994 at Essex Junction, Vermont. He is responsible for technology qualification and development of dielectric reliability methodologies. Dr. Wu has served on the device dielectric committee as a co-chair for 2000 International Reliability Physics Symposium (IRPS). He is a member of CMOS and Interconnect Reliability committee of International Electron Device Meeting (IEDM) for 1999 and 2000. He has authored and co-authored more than 80 technical and conference papers with several invited papers. In 2004, he received IBM Outstanding Technical Achievement Award for his contribution to ultra-thin gate reliability in advanced CMOS technology. His research interests include dielectric physics and reliability, device physics and reliability, and condense matter physics.

Jordi Suñé

Graduation in Physics in 1986 and PhD. in Electronics in 1989 both from the Universitat Autònoma de Barcelona (UAB). Research fellow at IMEC (1989) and at the University of Bologna (1990,1991). Full Professor of Electronics at the UAB since 2002. He has (co)authored more than 150 papers in international journals and relevant conferences, among which 8 IEDM papers, several invited papers and three tutorials on oxide reliability at the International Reliability Physics Symposium in 2001, 2004 and 2005. He has served in the technical committees of several conferences such as IRPS, IEDM, INFOS, and SISC. In 2004, he received the Award of the Generalitat de Catalunya for the promotion of Research. Main fields of interest are gate oxide physics and reliability and modeling and simulation of quantum transport.