RELIABILITY
YEAR-IN-REVIEW SEMINAR


Bill Tonti, Chair

Monday, March 27, 2:45 p.m. – 5:45 p.m
Panel: 6:00 p.m. – 7:00 p.m.

The year in review seminar is meant to provide an in depth view of present semiconductor reliability challenges as published in the literature. The experts were chosen because they have intimate knowledge in their respective topic areas.and have agreed to share their reviews of recent papers with the seminar attendees.

Organized by this year's Chair, Bill Tonti, advanced registered Monday Tutorial attendees can send in email requests to yir@irps.org for specific-2005 published papers, in the topics area for this year, to be reviewed.

Additionally, after a 15 minute break, the subject matter experts will form a panel at the conclusion of the individual presentations. They will provide their own insight in conjunction with the literature, and discuss areas they themselves think are challenges for reliability. A question and answer period will follow the panelists opening statements.

The Year in Review topics and speakers are:

BEOL Insulator + Conductor Reviewer: Ennis T. Ogawa

Ennis T. Ogawa is currently working in the Advanced Materials Reliability R&D Group under Silicon Technology Development (SiTD) at Texas Instruments (TI), Inc. in Dallas, TX. He received his B.S. degree in Physics from Stanford University in 1986 and his Ph.D. in Physics at The University of Texas at Austin in 1994. Following his doctoral degree, he worked as a postdoctoral fellow in the Interconnect and Packaging Laboratory, directed by Prof. Paul S. Ho, at The University of Texas at Austin and continued as a Research Associate until mid-2001. Since then, he has been at TI. His interests at TI pertain to the reliability of Cu/low-k backend Si technology that involve issues such as electromigration, stress-induced voiding, intermetal and interlevel dielectric reliability, and thermal management. An active participant in IRPS activities, he is also an author of several journal and conference articles and filed numerous patents in interconnect reliability. He remains very fascinated by fatherhood.

Device Reviewer: Ed Nowak

Ed Nowak received degrees in Physics with the S.B. in 1973 from M.I.T., and M.S. and Ph.D. in 1975 and 1978, respectively, from the University of Maryland. Following post doctoral research at New York University, Ed joined IBM in at Essex Junction, Vermont, to work on DRAM development in 1981. Since 1985 he has worked in high-performance CMOS device design, where, his current interests include energy-driven device design and FinFET device architectures. Dr. Nowak holds the title of Distinguished Engineer, and holds numerous patents in the areas of advanced device design.

SER Reviewer: Philippe Roche

Philippe Roche received the M.S. (1995) and Ph.D. (1999) in semiconductor physics from the University of Montpellier, France. In 1995, he worked on electronic noise at the University of Eindhoven, the Netherlands. From 1995 to 1996, he joined the French Atomic Energy Commission and contributed to researches on CMOS technologies for military applications. From 1996 to 1999, he worked on Single Event Effects in SRAMs at the University of Montpellier. In 1999, he held a summer staff position in the Radiation Effects Group at the Vanderbilt University, USA. Since 1999, he has been with the Central R&D of STMicroelectronics, Crolles, France, as project manager on radiation effects in semiconductor devices. His primary research activities are induced soft errors on sub-0.25µm commercial technologies. He has been serving in technical committees of conferences since 1997, such as recently session chairman at the 2004 International Nuclear Space Radiation Effects conference. Dr. Roche has coauthored more than 30 articles and has filed 17 patents in radiation hardening.

PRODUCT Reviewer: Walter Carl Riordan

Walter Riordan received the B.S (1980) in engineering physics from the University of Arizona, Tucson, Arizona. He joined Intel Corporation in 1980 as a reliability engineer for the 8048 family of single chip microcontrollers. In his 25 years at Intel Mr. Riordan has worked in a number of different quality, reliability, yield, and design roles, and as an engineer and manager on a number of NMOS, CMOS, and EPROM processes and product families. He is currently a principal engineer in the quality and reliability group at Intel's fabrication facilities in Chandler, Arizona where he is responsible for developing and implementing new quality and reliability systems into high volume manufacturing. His primary interests are in the areas of defect reliability, reliability modeling, predictive models, and burn in.