Introduction
to
Gate Oxide Reliability
James H. Stathis
IBM Research
Yorktown Heights, NY
Dielectric reliability is one of the most important fundamental issues in silicon technology, frequently engaging the reliability engineer in a battle with device and circuit designers over the tradeoff between reliability and performance. The critical importance of silicon dioxide as passivation layer and gate insulator –– and the continuous scaling in thickness from ~1 micron to ~1 nanometer –– has justified ongoing fundamental research into oxide reliabilty for over 40 years. This trend will intensify over the next several years with the introduction and rapid maturation of complex hafnium-based gate insulators with metal gates.
This tutorial will cover basic to more advance topics such as: physical models of breakdown, projection to use condition including Weibull statistics and power-law voltage projection, progressive breakdown, negative bias-temperature instability, and the effects of oxide breakdown and NBTI on circuits. The tutorial will be useful for beginners as well as for more experienced engineers and scientists ending with a discussion of the reliability issues facing new high-k gate dielectric materials.
James H. Stathis
Jim Stathis received the bachelor’s in physics from Washington University in St. Louis (1980), and the Ph.D. in physics from the Massachusetts Institute of Technology (1986), joining the IBM Research Division the same year. At IBM the focus of his work has been the electrical properties of point defects in SiO2, including basic studies of defect structure using magnetic resonance and electrical measurement techniques, and the role of defects in wearout and breakdown. He is the author or coauthor of more than 100 research papers and over 60 invited talks. From November 2005 to February 2007 he served as Technical Assistant to the Vice President for Science and Technology, IBM Research Division. In February 2007 he became manager of High-k/Metal-Gate Characterization and Reliability, IBM Research. Jim has served on technical program committees for SISC, INFOS, IRPS, ESREF, IPFA, and other conferences, served as Chair of the dielectrics sub-committee for the 2003 IRPS in Dallas, and is on the IRPS management committee. He has presented tutorials on CMOS reliability at IRPS, ESREF, and IPFA and is an Associate Editor of the journal Microelectronics Reliability. He is a Senior Member of IEEE and a Fellow of the American Physical Society.