The NBTI challenge spreading from technology to design



	The NBTI challenge spreading from technology to design - Design for Reliability

	Christian Schlünder, Infineon Technologies

	NBTI is nowadays the most critical device degradation mechanism and became a limiting factor in scaling of modern CMOS technologies. The increase of the electric field at the gate oxide and nitrogen incorporation, which is inevitable for dual workfunction technologies, led to stronger NBTI degradation in the past. Although the shrinking of gate oxide thickness is almost stopped at current technologies under development, the NBTI challenge will increase furthermore. Measures like the upcoming change to metal gates which avoid poly-depletion will lead to higher electric oxide fields even at fixed oxide thicknesses. The safety margin between real lifetime of MOSFETs and product lifetime requirements decreases at advanced technologies. The assignment of tasks to ensure the product lifetime has to be changed for the future. Up to now technology development has the main responsibility to adjust the technology processes to achieve the required lifetime. In future reliability can no longer be the task of technology development only. NBTI becomes a collective challenge for technology experts and circuit designers. Reliability issues have to be considered in design as well to achieve reliable and competitive products. For this work designers have to be supported by smart software tools with built-in reliability know how. Design for reliability will be one the key requirements for modern product designs. This talk will give a brief introduction of the NBTI phenomenon. An overview will be given of the physical damage mechanism, of the operation conditions within circuits leading to stress and of the impact of the corresponding device parameter degradation on the function of the circuit. Based on this understanding various approaches for Design for Reliability will be described. The function of aging simulators will be explained and the typical flow of circuit simulation will be shown. Some simple examples will be given. Furthermore the difference between full custom and semi custom design and therefore the different required approaches will be discussed. The introduction and illustration of one possible approach for the implementation of Design for reliability in semi-custom design will complete the session.



Christian Schlünder Dr. Christian Schlünder has received his Dipl.-Ing. (1999) in electrical engineering from the University of Dortmund, Germany. From 1998-1999 he worked in a cooperative program between Siemens Corporate Research Labs in Munich and the University of Dortmund in the field of characterization, modelling and reliability of analog CMOS circuits. After founding of Infineon Technologies AG, he worked for a short time as a technical consultant for Infineon, until he joined Infineon as a member of the Corporate Research Department, where he has been active in research on hot carrier stress. Today he is doing research work in the area of NBTI and wrote his PhD thesis on this topic in 2006 (University of Dortmund, Germany). Currently he is a Staff Engineer at the Infineon Central Reliability Methodology Group. He manages reliability qualification projects for various state-of-the-art CMOS-Technologies and working on the reliability of innovation technologies like SOI, MultiGate-FETs etc. He has published in several conference proceedings and microelectronic journals. He is frequently a member of the Technical Program Committee of the IEEE-conferences “IRPS”, “IRW” and referee of several IEEE journals.