IEEE IRPS 2007
RELIABILITY PHYSICS TUTORIALS & YEAR IN REVIEW SESSIONS
Sunday & Monday April 15-16


        

There are three tutorial registration choices: Sunday, Monday, or both
(Monday tutorial registration includes Year In Review 3:00 - 6:30 p.m.)


Chair: Prasad Chaparala, National Semiconductor 
408-721-8985; prasad.chaparala@nsc.com

Vice Chair: Anand Krishnan, Texas Instruments
972-995-1183; anandtk@ti.com


Sunday, April 15, TUTORIALS · 8:30 a.m. — 5:30 p.m.,
Phoenix Convention Center West Building

 


   Room A

101.  Introduction to Gate Oxide Reliability
Jim Stathis, IBM 
abstract
8:30 – 12:00 
111.  NBTI in p-MOSFETs: Characterization, Modeling, & Material Dependence
Souvik Mahapatra, IIT Bombay, Mumbai, India 
abstract
2:00 – 3:30 
112.  The NBTI challenge spreading from technology to design - Design for Reliability
Christian Schlünder, Infineon 
abstract
4:00 – 5:30 


  Room B

120.    SER Errors – History, Trends, & Challenges
Helmut Puchner, Cypress Semiconductor
abstract
(8:30 - 10:00)
130.   Latch-up
Steve Voldman, IBM
abstract
(10:30 - 12:00)
140.   On-chip ESD Protection
Elyse Rosenbaum, Univ. of Illinois at Urbana-Champaign
abstract
(2:00 - 5:30) 


  Room C

150.   Electromigration…From Black to Blech and beyond
Jim Lloyd, IBM
abstract
(8:30 - 12:00)
160.   Product Reliability – An Introduction
Robert Kwasnick, Intel
abstract
(2:00 - 3:30)
170.   Physics Based Reliability Qualification
Joey Bernstein, University of Maryland
abstract
(4:00 - 5:30)


  Room D
 

180.   Introduction to Reliability
Ted Dellin, Quick Start Micro Training
abstract
(2:00 - 5:30) 



Monday, April 16, TUTORIALS · 8 a.m. – 2:30 p.m.
and
YEAR IN REVIEW · 3 p.m. — 6:30 p.m.,
Phoenix Convention Center West Building

 


  Room A

201.    Mechanics of Interconnects
Zhigang Suo, Harvard University
abstract
(8:00 - 9:30) 
202.    Copper Extendability
Glenn Alers, UC Santa Cruz
(10 - 11:30) 
210.    Electrically Programmable Fuse – Programming, Reliability and Applications
C. Kothandaraman & C.E. Tian, IBM
abstract
(1:00 - 2:30) 


  Room B

221.   CMOS Scaling & Gate Stack Technology Trends
Raj Jammy, SEMATECH/IBM & Prashant Majhi, SEMATECH/Intel
abstract
(8:00 - 9:30) 
222.   Reliability Implication in CMOS & Gate Stack Scaling
Rino Choi & Gennadi Bersuker, SEMATECH
abstract
(10:00 - 11:30) 
230.   Atomic Scale Defects Involved in Modern MOS Gate Stack Reliability Problems
Pat Lenahan, The Pennsylvania State University
abstract
(1:00 - 2:30) 


  Room C

241.   NVM Reliability
Neil Mielke, Intel
abstract
(8:00 – 9:30)  
242.   Flash Process Technology Scaling Trends and their Impact to Reliability
Kiran Pangal, Intel
abstract
(10:00 – 11:30)  
243.   NVM – 2 (Embedded Memory)
Guoqiao Tao, NXP Semiconductors
abstract
(1:00 - 2:30) 


  Room D

250.   Application Specific Reliability and Performance Requirements for High Voltage and Power Devices
Sameer Pendharkar, TI
abstract
(8:00 - 9:30) 
260.   SRAM Scaling - Design and Reliability Challenges due to Stability Issues
Stewart Rauch/ Mary Weybright, IBM
(10:00 - 11:30) 
270.   Failure Analysis
Jim Colvin, Consulting Services
abstract
(1:00 - 2:30) 


  Year-In-Review · Room TBA

301.   NBTI YEAR-IN-REVIEW
Giuseppe LaRosa, IBM
abstract
(3:00 - 3:45) 
302.   Assembly Package Interface YEAR-IN-REVIEW
Rich Blish, Spansion and Bob Thomas, TEN
abstract
(3:45 - 4:30) 
303.   Gate Dielectrics YEAR-IN-REVIEW
Tanya Nigam, Cypress Semiconductor
abstract
(5:00 - 5:45) 
304.   Non-Volatile Memory YEAR-IN-REVIEW
Daniele Ielmini, Politecnico di Milano
abstract
(5:45 - 6:30)