92001
by: Sredni, J., Resource Optimization Institute
title: Design of Experiments: a Tool for Continuous Process Improvement
Continuous improvement
Critical input variables
Design of experiments (DOE)
92003
by: Stapper, C.H., Klaasen, W.A., IBM Corporation
title: The Evaluation of 16-Mbit Memory Chips with Built-in Reliability
Fault-tolerance
Multiple fault alignment
On-chip error-correction
Soft-error immunity
Yield-reliability correlation
92008
by: IslamRaja, M.M., Stanford University, Bariya, A.J., National Semiconductor Corp., Saraswat, K.C., Cappelli, M.A., McVittie, J.P., Stanford University, Moberly, L., Lahri, R., National Semiconductor Corp.
title: Development of Design Rules for Reliable Tungsten Plugs Using Simulations
Design rule development for tungsten plugs
Etch-back reliability
Tungsten via plug process
Via aspect ratio
Via void/keyhole
92011
by: Jain, V., Pramanik, D., Nariani, S.R., VLSI Technology Inc., Hu, C., Univ. of Calif, Berkeley
title: Internal Passivation for Suppression of Device Instabilities Induced by Backend Processes
Higher dangling bond densities/spin densities determination
Hot-carrier improvement with Si rich intermetal oxide
Si rich inter-metal oxides
Silicide nitride induced thickfield threshold voltage instability
92016
by: Quader, K.N., Univ. of Calif, Berkeley, Fang, P., Yue, J.T., Advanced Micro Devices, Ko, P.K., Hu, C., Univ. of Calif, Berkeley
title: Simulation of CMOS Circuit Degradation Due to Hot-Carrier Effects
AC hot-carrier stress
Circuit-speed degradation (hot-carrier induced)
Duty cycle dependence (of CHE degradation)
Frequency enhancement/degradation (hot-carrier-induced)
Hot-carrier simulator
Zero crossing effect
92024
by: Murali, V., Gasparek, M., Bhansali, A., Chen, S.H., Dias, R., Intel Corporation
title: Wire Bonding of Aluminum/Polyimide Multi-layer Structures
Al/Ti/PI bond integrity
Al/polyimide delamination
Intermetallic compound formation reduction
T/C induced Al/PI delamination
92031
by: Tanaka, H., Uchida, H., Hirashita, N., Ajioka, T., Oki Electric Industry Co. Ltd.
title: The Effect of Surface Roughness of Si3N4 Films on TDDB Characteristics of ONO Films
High resolution atomic force microscope, TEM
Silicon nitride thin film in ONO capacitors
Surface roughness increases with CVD deposition temperature, causing poor TDDB
92037
by: Shin, H.-, King, C.-C., Hu, C., University of Calif, Berkeley
title: Thin Oxide Damage by Plasma Etching and Ashing Processes
Gate-oxide damages caused by plasma processes in MOS
92042
by: Lo, G.Q., Kwong, D.L., University of Texas at Austin, Mathews, V.K., Fazan, P.C., Ditali, A., Micron Technology Inc.
title: Charge Trapping/Detrapping and Dielectric Breakdown in SiO2/Si3N4/SiO2 Stacked Layers on Rugged Poly-Si under Dynamic Stress
Oxide/silicon nitride/oxide composite films on rugged polysilicon vs. films on smooth polysilicon
TDDB under high frequency dynamic testing
92049
by: Cholan, H., Stunkard, D., Rubalcava, T., TriQuint Semiconductor, Inc.
title: Long-term Effects of Sidegating on GaAs MESFETs
Sidegating and backgating in GaAs FETs
Stability of backgating during life
Step stress evaluation of backgating
92054
by: Wang, S.J., Chen, I.C., Tigelaar, H.L., Texas Instruments, Inc.
title: TDDB on Poly-Gate Single Doping Type Capacitors
Over estimate of life time
Poly-gate (68 angstrom) MOS
Polysilicon-gate depletion causing errors in electrical data
92058
by: Varker, C.J., Pettengill, D., Shiau, W.-T., Reuss, B., Motorola, Inc.
title: Hot-Carrier Induced hfe Degradation in BiCMOS Transistors
Bipolar transistor current-gain degradation
92063
by: Komori, J., Maeda, S., Sugawara, K., Mitsuhashi, J.-I., Mitsubishi Electric Corp.
title: Evaluation of Hot-Carrier Effects in TFT by Emission Microscopy
Plasma hydrogenation reduced degradation
Polysilicon p-channel TFT
TFT (thin film transistor) hot-carrier degradation revealed by photoemission
92068
by: Roy, A., Kazerounian, R., Kablanian, A., Eitan, B., WaferScale Integration
title: Substrate-Injection-Induced Program Disturb New Reliability Consideration for Flash-EPROM Arrays
Analog Shift
Charge retention
Flash EPROM
Hot-electron
Optical carrier effects
PDSITE
Program disturb
Substrate hot electron
Thermal aging
Thermal carrier effects
92076
by: Mohamedi, S., Chan, V.-H., Mass. Inst. of Technology, Park, J.-T., Incheon University, Nouri, F., Scharf, B. W., Analog Devices, Chung, J. E., Mass. Inst. of Technology
title: Hot-Electron-Induced Input Offset Voltage Degradation in CMOS Differential Amplifiers
BiCMOS
CMOS
Degradation
Differential Amp
Hot-electron
Input offset voltage
Lifetime prediction
Transition effects
92081
by: Michael, C., Wang, H., Teng, C.S., Shibley, J., Lewicki, L., Shyu, C.-M., Lahri, R., National Semiconductor Corp.
title: Mismatch Drift: A Reliability Issue for Analog MOS Circuits
Analog Shift
Beta degradation
CMOS
Current mirror
Hot-carrier
Lifetime prediction
Matched transistor
Mismatch drift
NMOS
Negative trapped charge
PMOS
Trapped charge
Vt shift
92085
by: Wang, C.T., Haddad, H., Berndt, P., Yeh, B.-S., Connors, B., Hewlett-Packard
title: Pipeline Defects in CMOS MOSFET Devices Caused by SWAMI Isolation
CMOS
Dislocation lines
EEPROM
Enhanced diffusion
Failure analysis
Ferroelectric
LDD
P-doping effects
Pipe defects
SWAMI isolation
Static RAM
Stress effects
Thermal aging
92091
by: Gregory, A., Zucca, R., Wang, S.Q., Brassington, M., Abt, N., National Semiconductor
title: Thermal Stability of Ferroelectric Memories
Ferroelectric PZT (lead zirconate titanate) & CMOS
Ferroelectric memories, fatigue & aging data
Thermal excursion effects on remanent polarization level in polycrystalline films
92095
by: Dreyer, M.L., Durec, J., Motorola, Inc.
title: Low Frequency 1/f Noise and Current Gain Degradation in BiCMOS n-p-n Transistors
Beta degradation
BiCMOS
Bipolar
Hot-carrier
Interface traps
Lifetime prediction
Noise, 1/f
Polysilicon emitter
Reverse bias stress
hFE degradation
92102
by: Onishi, S., Ayukawa, A., Uda, K., Sakiyama, K., Sharp Corp.
title: Defect-Free Shallow p-n Junction by Point-Defect Engineering
B diffusion
Defect removal
Dislocation loops
Junction defects
Junction leakage
LDD
Point defect engineering
Shallow junction
Stacking faults
Stress effects
92107
by: Burnett, J.D., Lage, C., Hayden, J.D., Motorola, Inc.
title: Bipolar Reliability Optimization through Surface Compensation of Base Profile
BiCMOS
Bipolar
Hot-carrier
Interface trapping
Polysilicon emitter
Reverse bias stress
Ring Osc.
Surface compensation
92112
by: de Schrijver, E., IMEC vzw, Heremans, P., Bellens, R., Groeseneken, G., Maes, H.E., UnivMicroCentrum
title: Post-Stress Interface Trap Generation: A New Hot-Carrier-Induced Degradation Phenomeon in Passivated n-Channel MOSFETs
Hot-carrier degradation continued in pFET's after stressing terminated
Neutral and positive hydrogens released during stress
Silicon nitride passivation caused the problem
92116
by: Mistry, K.R., Krakauer, D.B., Doyle, B.S., Spooner, T.A., Jackson, D.B., Digital Equipment Corporation
title: An In-Process Monitor for n-Channel MOSFET Hot-Carrier Lifetimes
Noise, 1/f, not effective monitor
Snapback stress for in-process monitor of oxide damages, improving reliability of finished n-MOSFET's
92122
by: Jiang, C., VLSI Technology, Inc., Hu, C., University of Calif, Berkeley, Chen, C.H., Tseng, P.N., Taiwan Semiconductr Mfg Co Ltd
title: Impact of Inter-Metal-Oxide Deposition Condition on NMOS and PMOS Transistor Hot-Carrier Effect
Hot-carrier effect life-time in MOSFET's affected by interlevel-metal-oxide deposition
Plasma Enchanced Chemical Vapor Deposition, Tetraethylorthoscilicate
Silane-based PECVD oxide vs. TEOS-based oxide
92127
by: Watanabe, A., Fujimoto, K., Oda, M., Nakatsuka, T., Tamura, A., Matsushita EIec Indus Co. Ltd.
title: Rapid Degradation of WSi Self-Aligned Gate GaAs MESFET by Hot-Carrier Effect
Hot-carrier degradation in self-aligned gate GaAs FETs
Light emission due to hot-carriers
Passivation, affect on degradation
92131
by: Fang, P., Yue, J.T., Wollessen, D., Advanced Micro Devices
title: A Method to Project Hot-Carrier-Induced Punch Through Voltage Reduction for Deep Submicron LDD PMOS FETs at Room and Elevated Temperatures
Punch-through voltage induced by hot-carriers in PMOS, a reliability predictor; submicron LDD
Submicron LDD
92136
by: Yoshii, I., Toshiba Corporation, Hama, K., Toshiba Microelectronics Corp., Hashimoto, K., Toshiba Corporation
title: Role of Hydrogen at Poly-Si/SiO2 Interface in Trap Generation by Substrate Hot-Electron Injection
Forming gas anneal; polysilicon-oxde interface released hydrogens by hot electrons from Si substrate
Trap generation in NMOS by hydrogen released by hot electrons
92141
by: Duvvury, C., Diaz, C., Texas Instruments, Inc.
title: Dynamic Gate Coupling of NMOS for Efficient Output ESD Protection
ESD protection of DRAM and logic chips using dynamic gate coupling and NMOS output buffer
First and second snapbacks, LDD, silicided junction
92151
by: Bivens, G.A., Pello, E.F., Rome Laboratory (AFSC)
title: Using FEA to Develop a MIL-HDBK-217 SMT Model
Coffin-Manson theory, applied to surface mount solder interconnects
Finite element analysis, developing an surface mount technology (SMT) reliability prediction model
Finite element modeling, of surface mount solder interconnects
MIL-HDBK-217, reliability predictions of surface mount components
MIL-HDBK-217, surface mount technology (SMT) model
PCB, printed circuit boards, material influence on thermal fatigue of solder interconnects
Surface mount devices, MIL-HDBK-217, reliability predictions
Surface mount devices, effect of lead style on thermal fatigue of solder
Surface mount devices, effect of thermal cycling on reliability
Thermal coefficient of expansion, effect on surface mount reliability
Thermal cycling, effect on reliability of surface mounted devices
Weibull distribution, applied to thermal cycle fatigue of surface mounted devices
92157
by: Shook, R.L., AT&T Bell Laboratories
title: Moisture Sensitivity Characterization of Plastic Surface Mount Devices Using Scanning Acoustic Microscopy
CSAM, C-Mode scanning acoustic microscopy
Cracking, SMT package moisture-induced delamination
Delamination, SMT package moisture-induced
Dry bagging, of moisture sensitive surface mount devices
JEDEC Test Method A112, moisture sensitivity criteria for surface mount devices
Moisture sensitivity, of plastic surface mounted devices
Moisture sensitivity, plastic SMT packages
Moisture-induced cracking & delamination in plastic packages
PLCC, plastic leadless chip carrier, moisture sensitivty of
PQFP, plastic quad flatpack, moisture sensitivity of
Plastic package cracking, effect of solder reflow
Plastic package delamination, effect of die attach paddle size
Plastic package delamination, effect of humidity aging
Preconditioning, moisture exposure and reflow soldering before stress testing
Preconditioning, plastic SMT packages
Scanning acoustic microscopy, analysis of plastic packages
Scanning acoustic microscopy, of surface mounted devices
Solder reflow, effect on integrated circuit reliability
Surface Mount technology, solder reflow damage in plastic packages
Surface mount devices, diffusion theory of moisture absorption
Surface mount devices, package cracking during reflow soldering
Surface mount devices, weight gain due to humidity aging
Surface mount technology, moisture sensitivity of plastic SMT packages
Surface mount technology, moisture-induced cracking & delamination in plastic packages
Surface mount technology, preconditioning to simulate board assembly process
92169
by: Moore, T.M., Kelsall, S.J., Texas Instruments, Inc.
title: The Impact of Delamination on Stress-Induced and Contamination-Related Failure in Surface Mount ICs
CSAM, C-Mode scanning acoustic microscopy
Corrosion, as a result of flux ingress during preconditioning
Cracking, SMT package moisture-induced
Delamination, SMT package moisture-induced
Moisture sensitivity, of plastic surface mounted devices
Moisture sensitivity, plastic SMT packages
Moisture-induced cracking & delamination in plastic packages
PLCC, plastic leadless chip carrier moisture sensitivity of
PQFP, plastic quad flatpack, moisture sensitivity of
Plastic package cracking, effect of solder reflow
Plastic package delamination, effect of Cu vs. Ni leadframe finish
Plastic package delamination, effect of humidity aging
Plastic package delamination, effect of polyimide die coating
Plastic surface mount packages, reliability performance
Polyimide die coating, effect on delamination during temperature cycle
Preconditioning, moisture exposure and reflow soldering before stress testing
Preconditioning, plastic SMT packages
Reliability performance, with moisture-induced solder reflow damage
Scanning acoustic microscopy, analysis of plastic packages
Scanning acoustic microscopy, of surface mounted devices
Solder reflow, effect on integrated circuit reliability
Surface mount devices, package cracking during reflow soldering
Surface mount technology, corrosion induced performance degradation
Surface mount technology, moisture sensitivity of plastic SMT packages
Surface mount technology, moisture-induced cracking & delamination in plastic packages
Surface mount technology, preconditioning to simulate board assembly process
Surface mount technology, solder reflow damage in plastic packages
Wire bond, delamination-induced Au ball bond degradation
Wire bond, effect of mold compound and die coating on pull and shear
Wire bond, moisture-induced Au ball bond degradation
92177
by: van Gestel, R., de Zeeuw, K., Delft University of Technology, van Gemert, L., Bagerman, E., Philips Semiconductors
title: Comparison of Delamination Effects between Temperature Cycling Test and Highly Accelerated Stress Test in Plastic Packaged Devices
CSAM, C-Mode scanning acoustic misroscopy
Corrosion, as a result to a packaged reliability test chip
Delamination, SMT package moisture-induced
HAST, highly accelerated stress testing, as applied to a packaged reliability test chip
Moisture sensitivity, plastic SMT packages
PLCC, plastic leadless chip carrier, using a packaged reliability test chip
Passivation cracking, as a result of temperature cycling
Plastic package delamination, as a result of HAST testing
Plastic package delamination, as a result of temperature cycling
Plastic surface mount packages, reliability performance
Preconditioning, plastic SMT packages
Reliability performance, with moisture-induced solder reflow damage
Scanning acoustic microscopy, analysis of plastic packages
Scanning acoustic microscopy, of surface mounted devices
Surface mount devices, delamination resulting from temperature cycling and HAST
Surface mount technology, moisture sensitivity of plastic SMT packages
Surface mount technology, moisture-induced cracking & delamination in plastic packages
Surface mount technology, preconditioning to simulate board assembly process
Surface mount technology, solder reflow damage in plastic packages
Wire bond, delamination-induced Au ball bond degradation
Wire bond, failure due to temperature cycling
Wire bond, moisture-induced Au ball bond degradation
92182
by: Harada, M., Tanigawa, S., Ohizumi, S., Ikemura, K., Nitto Denko Corporation
title: X-ray Analysis of Package Cracking During Reflow Soldering
Adhesive die attach, effect on moisture-induced cracking & delamination in plastic packages
Adhesive die attach, plastic package
Cracking, SMT package moisture-induced
Delamination, SMT package moisture-induced
Moisture sensitivity, of plastic surface mounted devices
Moisture sensitivity, plastic SMT packages
Moisture-induced cracking & delamination in plastic packages
PQFP, plastic quad flatpack, moisture sensitivity of
Plastic package cracking, effect of solder reflow
Plastic package delamination, between die pad and mold compound
Plastic package delamination, effect of die attach adhesives
Plastic package delamination, theoretical model for
Plastic package delamination, use of x-ray imaging
Plastic surface mount packages, reliability performance
Popcorn cracking, plastic package cracking during solder reflow
Preconditioning, moisture exposure and reflow soldering before stress testing
Preconditioning, plastic SMT packages
Small outline devices (SOIC, SOJ) moisture sensitivity
Solder reflow, effect on integrated circuit reliability
Surface mount devices, package cracking during reflow soldering
Surface mount technology, moisture sensitivity of plastic SMT packages
Surface mount technology, moisture-induced cracking & delamination in plastic packages
Surface mount technology, preconditioning to simulate board assembly process
Surface mount technology, solder reflow damage in plastic packages
X-ray analysis, effect of die attach adhesive on plastic SMT package delamination/cracking
X-ray analysis, moisture sensitivity characterization of SMT packages
92190
by: Marks, M.R., Advanced Micro Devices Pte.Ltd
title: New Thin Plastic Package Crack Mechanism Induced by Hot IC Die
C-Mode Scanning Acoustic Microscopy (C-SAM of C-AM)
Cracking, Hot IC die induced cracking in plastic package
Cracking, SMT package moisture-induced
Delamination, SMT package moisture-induced
Fourier-Transform infrared spectroscopy (FTIR)
Hot IC die, plastic package cracking induced by hot IC die
Latch-up, plastic package cracking induced by hot IC die
Moisture sensitivity, plastic SMT packages
Moisture-induced cracking & delamination in plastic packages
PLCC, plastic leadless chip carrier, cracking in due to CMOS latch-up
Plastic package cracking as a result of CMOS latch-up
Plastic surface mount packages, reliability performance
Popcorn cracking, as distinguished from other types of cracking
Scanning acoustic microscopy, analysis of plastic packages
Scanning acoustic microscopy, used to image electrically overstressed mold compound
Surface mount technology, moisture sensitivity of plastic SMT packages
Surface mount technology, moisture-induced cracking & delamination in plastic packages
TGA, thermogravimetric analysis of mold compound
92198
by: Perrault, G.C., Cypress Semiconductor, Thornton, A.W., Micromeritics
title: Mercury Porosimetry Investigation of Plastic, Integrated Circuit Packages
Autoclave, failures from investigated with mercury porosimetry
Epoxy encapsulant, characterization of pores and elastic properties
HAST, highly accelerated stress test, failures from investigated with mercury porosimetry
Mercury porosimetry, characterization of pores and elastic properities in plastic packages
Mercury porosimetry, theory of
Mercury porosimetry, used to measure external package cracks and voids
PCT, pressure cooker test (autoclave), failures from investigated with mercury porosimetry
Porosimetry, characterization of pores and elastic properites of plastic packages
92205
by: Hinode, K., Furusawa, T., Homma, Y., Hitachi, Limited
title: Relaxation Phenomenon During Electromigration Under Pulsed Current
Critical frequency
Electromigration, pulsed-current stress
Electromigration, relaxation mechanisms
Electromigration, resistance changes
Mechanical stress gradiant changes due to vacancy migration
Metallization
Pulsed electromigration stress relaxation
Relaxation mechanism, current-on and current-off
Resistance change due to mechanical stress change
Vacancies, formation of & annihilation of
Vacancy migration, long distance
92211
by: Li, X.X., Zhang, W., Ji, Y., Wang, Z., Cheng, Y.H., Gao, G.B., Beijing Polytechnic University
title: Increase in Electromigration Resistance by Enhancing Backflow Effect
Backward diffusion of electomigration
Blech length
Discontinuous Si02 backflow enhancer
Electromigration resistance by backflow
Electromigration, backflow enhancement
Electromigration, design improvements
Enhanced backflow of electomigration
Ion accumulation & depletion
Metallization
Structure changes to impede electromigration
Test structure design
92217
by: Livesay, B.R., Georgia Institute of Technolgy, Donlin, N.E., U.S. Army Missile Command, Garrison, A.K., Harris, H.M., Hubbard, J.L., Georgia Institute of Technolgy
title: Dislocation-based Mechanisms in Electromigration
Crystalline defects
Dislocation dynamics in electomigration
Dislocation mechanisms in electomigration
Electoplastic effects in metallization
Electromigration, dislocation dynamics
Electromigration, in-situ SEM and TEM measurements
Electromigration, mechanical strengthening
Electromigration, pulsed-current stress
Interface strengthening, ICs
Lattice distortions
Metallization
Micromechanics measurements
Peierls - Nabarro stress in metallization
Voids
Whisker growth
92228
by: Head, L.M., Le, B., SUNY Binghamton, Chen, C.T.M., Swiatkowski, J., University of South Florida
title: Statistical Distribution of 1/f 2 Noise in Thin Metal Films under Accelerated Electromigration Test Conditions
Current dependence
Electromigration, distribution of noise levels
Electromigration, noise measurements
Excess current noise distribution
Low frequency power spectrum
MTF (median time to failure) noise measurement comparison
Metallization
Noise magnitudes
Noise, 1/F2, in Al(Si)
Noise, 1/F2, correlation to electromigration
Noise, low-frequency
Statistical distribution
Thin film metallizations
92232
by: Dion, M.J., Sematech
title: Finite Element Analysis of a SWEAT Structure with a 3-D, Nonlinear, Coupled Thermal-Electric Model
EXTRA (Extraction of Temperature and Resistance for Acceleration of electromigration)
Electromigration, SWEAT structure
Electromigration, finite element models
Electromigration, thermal analysis
Lateral heat flow
Metallization
Modeling/simulation of sweat structure
SWEAT structure, 3D non-linear, thermal-electric model
SWEAT structure, finite element analysis
Temperature determination
92239
by: Griffin, Jr., A.J., Brotzen, F.R., Rice University, McPherson, J.W., Dunn, C.F., Texas Instruments, Inc.
title: Corrosion Susceptibility of Thin-Film Metallizations
AC impedance spectroscopy
Al and Al-Cu corrosion susceptibility
Cathodic reduction sites.
Corrosion resistance
Corrosion tendency in metallization
Corrosion, oxide-layer defects
DC polarization of thin-film metal-oxide
Defects in thin-film metal-oxide
Electrochemical impedance spectroscopy of thin film metal-oxide
Measurements: dc polarization
Measurements: impedance spectroscopy
Metallization oxide-layer capacitance
Metallization oxide-layer resistance
Nyquist Plots
Oxide weak spots
Oxide-layer thickness
92247
by: Lippe, K., Hasper, A., Elfrink, G.W., Niehof, J., Kerkhoff, H.G., University of Twente
title: A Test Chip for Automatic Reliability Measurements of Interconnect Vias
Accelerated testing
Automated via electromigration measurements
BiCMOS process
Electromigration, comparison: W, Al vias
Electromigration, current stress: dc/pulsed(uni- and bi-polar)
Electromigration, measurement automation
Electromigration, reliability measurements
Electromigration, test design evaluation
Electromigration, vias
Metallization
Multi-level interconnections
Test chip design
Via electromigration stress circuit
Via electromigration test chip
Via-hole chains
Via-hole reliability
92251
by: Shell-DeGuzman, M., Mahaney, M., Intel Corporation
title: The Bond Shear Test: An Application for the Reduction of Common Causes of Gold Ball Bond Process Variation
Au Ball Bonder; K&S 1482
Au-Al Intermetallic, Au ball bond
Au-Al Intermetallics
Ball bonding, thermosonic
Bond shear variability
Capillary coupling, Au ball bond
Characterization, bonding window
Factorial, power force
Measurement capability
Measurement capability, shear system
Parameters, ball bonding thermosonic
Process variation Au ball bond
Shear strength, Au ball bond
Shear test ball bond
Variability, wire bond process
92258
by: Yap, B.C., Jeng, J.K., Chang, L.L.S., Industrial Tech Research Inst
title: Characterization of Dynamic Spatial Conduction Patterns on ESD Protection Circuitry by Photon-Counting Imaging Method
Bipolar snapback
Charge Device Model (CDM), ESD model
ESD protection circuitry
ESD protection devices, thick field oxide NMOS
Emerging failure observation, ESD protection devices
Emission images
Emission microscopy
Emission patterns
Human Body Model (HBM), ESD model
IR imaging
Imaging, photo-counting
Machine Model (MM), ESD model
NMOS thick field oxide device, ESD protection
Pulse electroluminecence
Thick field oxide NMOS
Transmission line pulsing
Viewing spatial current dissipation patterns
92268
by: Huston, H. H., Clarke, C.P., IBM Corporation
title: Reliability Defect Detection and Screen during Processing Theory and Implementation
Critical areas, reliability and yield
Defect data, yield and reliability
Detection, reliability defect
Extrinsic reliability
Intrinsic reliability
Mavericks, misprocessed
Measurements, electrical in-process, related to reliability defects
Monitors, yield and reliability
Reliability critical area
Reliability defect modeling
Screening, reliability
Statistical Process Control (SPC)
Wearout
Yield management
Yield models
92276
by: Hasnain, Z., Ditali, A., Micron Technology, Inc.
title: Building-In Reliability: Soft Errors A Case Study
Alpha Emission Rate (AER)
Building-In Reliability (BIR)
Critical areas, reliability and yield
Defect data, yield and reliability
Detection, reliability defect
Errors, soft in DRAMs
Measurements, electrical in-process, related to reliability defects
Monitors, yield and reliability
Phosphoric acid, AER
Po-210, in Phosphoric Acid
Proportional counter
Reliability defect models
Screening, reliability
Soft error rate (SER)
Statistical Process Control (SPC)
Wafer-level reliability (WLR)
Yield models
92281
by: Jones, R.H., Brunel University
title: Built-In Real-Time Reliability Automation (BIRRA)
Acquired-knowledge database (AKDB)
Comparison machine vision
Database, acquired-knowledge
Database, prediction
Detection, defect
Local defects: spot vs. point
Microscope (SOM)
Monitoring, defect in situ
PROLOG
Point defects
Quantization error (QE)
Resolution, optical
Scanning Optical
Scanning Optical Microscope (SOM)
Scanning, entire wafer
Spot defects
Stuck-at fault (SAF)
Testing, scanning laser beam
Yield
92288
by: Cole, E.I., Anderson, R.E., Sandia National Laboratories
title: Rapid Localization of IC Open Conductors Using Charge-Induced Voltage Alteration (CIVA)
Charge-induced voltage alteration (CIVA)
Conductor open circuit detection and localization
Failure analysis of passivated ICs
IC failure analysis technique
Imaging of IC failures
Nondestructive failure analysis
Rapid failure localization
SEM technique
92299
by: Neubauer, G., Dass, M.L.A., Intel Corporation, Johnson, T.J., Massacusetts Institute of Tech
title: Imaging VLSI Cross-Sections by Atomic Force Microscopy
AFM imaging of IC cross sections
Atomic Force Microscopy (AFM)
Cross sections of ICs
High resolution imaging
Rapid imaging of IC cross sections
Scanning Probe Microscopy (SPM)
VLSI
92304
by: Jenkins, K.A., Agnello, P.D., Bucelot, T.J., IBM Research Division
title: Analysis of Silicide Process Defects by Non-Contact Electron-Beam Charging
Electron beam charging
Gate electrode isolation
SEM technique
Titanium silicide gate cap
Voltage contrast
Yield analysis
92309
by: Siettmann, J., Dias, R., Fiebelkorn, K., Intel Corporation
title: Acoustic Evaluation of Electronic Plastic Packages
A-SAM
Acoustic imaging of packaged ICs
C-SAM
C-SAM image acquisition
Failure analysis of Plastic packages
IC package delamination
Imaging of plastic package leadframe
Plastic packages
Scanning Acoustic Microscopy (SAM)
92315
by: Abramo, M.T., Roy, E.B., IBM Corporation, Lecours, S., University of Pennsylvania
title: Reactive Ion Etching for Failure Analysis Applications
Anisotropic etching
CF4
CHF3
Delayering for failure analysis
Design of experiments (DOE)
Organic passivation etching
Plasma etching
Polysilicon etching
RIE grass
RIE process development
Reactive ion etching (RIE)
SF6
Silicon dioxide etching
92320
by: Baerg, W., Rao, V.R.M., Livengood, R., Intel Corporation
title: Selective Removal of Dielectrics from Integrated Circuits for Electron Beam Probing
Anisotropic etching
Delayering for failure analysis
Electron beam probing
Endpoint detection
Nondestructive dielectric removal
Plasma etching
RIE of packaged ICs
Reactive ion etching(RIE)
Three level metallization
Voltage contrast
92327
by: Christianson, K.A., Roussos, J.A., Anderson, W.T., Naval Research Laboratory
title: Reliability Study of GaAs MMIC Amplifier
GaAs MMICs, RF life testing
Leakage currents at passivation/GaAs interface
Low frequency transconductance as diagnostic tool
92332
by: Ryan, P., University of Illinois, Davis, K., Rawat, S., Intel Corporation
title: A Case Study of Two-Stage Fault Location
Automatic fault location
Fault simulation
Stuck-at-fault (SAF)
Two-stage fault location
92338
by: Tao, J., University of Calif, Berkeley, Young, K.K., HP Company, Cheung, N.W., Hu, C., University of Calif, Berkeley
title: Comparison of Electromigration Reliability of Tungsten and Aluminum Vias under DC and Time-Varying Current Stressing
AC stressing
Al/W via contact reliability
Bidirectional stressing current
Comparative electromigration of W and Al vias
Electromigration, vias
Metallization
Plug via lifetime
Pulsed DC stressing
Test structure
Via comparison under various current stresses
92344
by: Yoshida, T., Kawahara, H., Ogawa, S.-I., Matsushita EIec Indus Co. Ltd.
title: A New Mechanism for Degradation of Al-Si-Cu/TiN/Ti Contacted p-n Junction
Applied electric field effect
Degradation mechanisms
Failure mechanism
Junction leakage
Leakage mechanisms
Mobile Cu+ ions
Reverse bias iv characteristics
Soft breakdown
Ti N/Ti/Si contact leakage
Ti diffusion, field enhanced
Ti-Si contact leakage
Ti-Si layer crystallinity
Time dependent p-n junction degradation
p-n junction, Ti diffusion
p-n junction, Ti-Si contact interface
p-n junction,time-dependent degradation
92349
by: Yamaha, T., Naitou, M., Hotta, T., Yamaha Corporation
title: Three Kinds of Via Electromigration Failure Modes in Multilevel Interconnections
Activation energy values
Al grain size
Al/Al via failure mode
Al/Ti/Al via failure modes
Electromigration life tests
Electromigration, design implications
Electromigration, evaluation: metal systems
Electromigration, failure modes
Electromigration, vias
Focused ion beam milling
Metallization
Multilayer metallization via failure mode
Passivation related stress
Temperature gradients
Via chains
Via voids, electromigration
Void formation model
WSi metallization voids
92356
by: Freiberger, P., Wu, K., Intel Corporation
title: A Novel Via Failure Mechanism in Al-Cu/Ti Double Level Metal System
Al-Cu/Ti dual level metal failures
Al-Cu/Ti metallization system
Al-Cu/Ti via failure mechanism
Cerdip assemble process
Failure mode, chemical reaction
Failure mode, thermal stress
Failure mode, vias (Al-Cu/Ti)
Hot spots
Ion milling
Metal volume reduction in range 250-450°C
Metallization
SEM cross section
Slit like voids
Stress bake
Stress migration
Stress migration failures
Thermal cycles
Ti-Al reaction failure
Via contacts
Via metal voiding driven by high temperature
Wafer bake cycles
Wedge shaped voids
92361
by: Weide, K., Hasse, W., Universitat Hannover
title: Three-Dimensional Simulations of Temperature and Current Density Distribution in a Via Structure
Current density distribution
Filling ratio
Local temperatures
Overlap
Self heating effects
Step coverage current density simulation
Temperature distribution
Via current crowding
Via current density simulation
Via finite element analysis
Via temperature simulation
92366
by: Nogami, T., Oka, S., Naganuma, K., Nakata, T., Maeda, C., Haida, O., Kawasaki Steel Corporation
title: Electromigration Lifetime as a Function of Line Length and Step Number
Electromigration lifetime, function of line length
Electromigration lifetime, function of number of steps
Grain size
Step coverage
Stress at metallization steps
Weibull distribution shape parameter, application
92373
by: Menon, S.S., Gorti, A.K., Poole, K.F., Clemson University
title: Influence of Grain Size on Defect-Related Early Failures in VLSI Interconnects
Accelerated life-tests vs use tests
Defect-related early metallization failures
Defect/grain boundary interaction
Early metal failures of small grain size metal
Extrapolation of accelerated conditions to use conditions
Grain morphology
Grain-size dependence of early metal failures
Intentional defects
Large grains to reduce defect-related early failures
Longitudinal grain boundaries
Metal defect size to grain size ratio
Pinholes
Process-induced defects
Sigma variations due to defect/grain size ratio
Statistical process control
Stress voiding
Texture
Thermal coefficient of expansion
Thermal gradients