Keynote Speakers

IRPS 2027 Keynote Speakers

Silent Data Corruption: Optimal Mitigation Strategies for Data Center Computing

Dr. Nirmal R. Saxena
Senior Director, Accelerated and Resilient Compute Systems (ARCS) Architecture NVIDIA

Biography: Nirmal R. Saxena is currently a Senior Director at NVIDIA and leads the Accelerated and Resilient Compute Systems Architecture team. From 2011 through 2015, Nirmal was associated with Inphi Corp as CTO for Storage & Computing and with Samsung Electronics as Sr. Director working on fault tolerant DRAM memory and storage array architectures. During 2006 through 2011, Nirmal held roles as a Principal Architect, Chief Server Hardware Architect & VP at NVIDIA.  From 1991 through 2009, he was also associated with Stanford University’s Center for Reliable Computing and EE Department as Associate Director and Consulting Professor, respectively. During his association with Stanford University, he taught courses in Logic Design, Computer Architecture, Fault-Tolerant Computing, supervised six PhD students and was co-investigator with Professor Edward J. McCluskey on DARPA’s ROAR (Reliability Obtained through Adaptive Reconfiguration) project.  Nirmal was the Executive VP, CTO, and COO at Alliance Semiconductor, Santa Clara.  Nirmal has served in senior technical and management positions at Chip Engines, Tiara Networks, Silicon Graphics, HaL Computers, and Hewlett Packard.

Nirmal received his BE ECE degree (1982) from Osmania University, India; MSEE degree (1984) from the University of Iowa; and Ph.D. EE degree (1991) from Stanford University.  He is a Fellow of IEEE (2002) and was cited for his contributions to reliable computing.

Abstract: Given current data center compute scales, extended job durations, and existing detection mechanisms, the risk of silent data corruption (SDC) exposure is substantial. Leveraging existing detection coverage and SDC characteristics, we propose optimized SDC mitigation strategies that balance availability and reliability. These optimization strategies for SDC mitigation aim to approach Shannon-capacity-like limits on the overhead required for reliable compute channels. Although error-correcting codes effectively address transient faults in memory, storage, and high-speed links, residual SDC risks persist. We advocate for algorithm-based error detection (ABED) to bridge this gap and stress the need for ongoing ABED research to adapt to evolving compute patterns. Low-level fault simulation for SDC assessment in long-running jobs is impractical; instead, near-real-time evaluation is essential. Although our approach partially addresses systematic faults, robust design verification and manufacturing tests remain critical for comprehensive fault management. This keynote highlights the urgency of scalable, efficient SDC detection in large-scale systems.

Edge AI and Distributed On Sensor Intelligence for AI Wearable Devices and future Humanoid Robots

Dr. Barbara De Salvo
Director of Research at Meta Reality Labs Research

Biography: Barbara De Salvo is Director of Research at Meta Reality Labs Research, leading new AI sensing technologies and low-power systems/ML architectures for future wearables and humanoid robots. Previously, she was Chief Scientist and Deputy Director at CEA-LETI, where she also founded and led the advanced memory technology division, advancing disruptive memories (phase-change, resistive, and conductive-bridge) and pioneering neuromorphic hardware for ultra-low-power cognitive systems. She was a visiting scholar at IBM Albany (2013–2015) in the sub-10nm CMOS International Technology Alliance, where her research contributed to technologies such as FDSOI, FinFET, and stacked nanowire platforms. She has authored 500+ peer-reviewed articles, 10 book chapters, a Wiley monograph on silicon non-volatile memories, and holds multiple patents. She served as General Chair of IEEE IEDM 2022 and in several IEEE leadership roles. She is an IEEE Fellow.

Abstract: Human–computer interaction has evolved from early personal computing to today’s always-connected, AI-powered wearable devices, including glasses, wristbands, rings, and pendants. These wearable interfaces seamlessly blend the physical and digital worlds and enable more personal, contextual AI interactions. These next-generation computing platforms require tight co-design across sensors, compute, displays, power, thermals, packaging, and algorithms, where performance per watt is a defining constraint. A central enabler is bringing AI to the edge and distributing intelligence across platforms, including on-sensor AI, to reduce data movement, latency, and energy while improving privacy and robustness. These distributed intelligence architectures also apply to humanoid robots and other embodied agents, which demand real-time perception and action under stringent power budgets, motivating novel technologies and deep hardware–software co-optimization across the full system.

Building Trust at Optical Scale : Reliability for Silicon Photonics-Powered AI Infrastructure

Dr. Subal Sahni
VP, Technology, Marvell

Biography: Subal Sahni is Vice President of Technology at Marvell Technology. He joined Marvell through the acquisition of Celestial AI, where he was Vice President of Photonics. Previously, Subal held senior technical and management roles at Cisco Systems and Luxtera Inc.

Subal has more than 20 years of experience in the development and productization of integrated optics and brings a deep understanding of every phase of the engineering lifecycle, from design through high-volume manufacturing. He has delivered numerous invited talks and published extensively in the field of silicon photonic integration, and he holds more than 30 patents spanning technology and product development.

 Subal received his B.Tech. degree in Engineering Physics from the Indian Institute of Technology Bombay, India, and his M.S. and Ph.D. degrees in Electrical Engineering from the University of California, Los Angeles.

Abstract: As optical connectivity moves deeper into AI scale-up infrastructure, the pace of adoption will increasingly depend not only on photonic performance, but on integration, manufacturability and reliability at volume. Co-packaged optics and 3D-integrated silicon photonics offer significant gains in bandwidth, power efficiency and system scalability, while introducing new failure surfaces across the optical connector, photonic integrated circuit (PIC), external laser source and heterogeneous package.

This keynote examines what it takes to scale these technologies reliably: how qualification methodologies must evolve to address photonic-specific failure mechanisms, heterogeneous integration risks and hyperscale operating conditions, and what Marvell has learned building and deploying these systems in high-volume manufacturing.

The talk spotlights that delivering the bandwidth required for optical scale-up is only part of the challenge; earning trust at hyperscale requires reliability, manufacturability and qualification to scale with it. It will explore what the industry must solve together to enable predictable, scalable deployment of silicon photonics across next-generation AI infrastructure.

Archives

IRPS 2026 Keynote Speakers

  • Jun He,‍ Vice President of Advanced Packaging Technology and Service, TSMC

  • Bruce Hendrickson, Principal Associate Director for Computing, Lawrence Livermore National Laboratory

  • Sri Samavedam, Senior Vice President, Semiconductor Technologies and Pathfinding, imec

  • Vilas Sridharan, AMD Senior Fellow, AMD, Inc.

IRPS 2025 Keynote Speakers

  • Min Cao, Vice President of Pathfinding and Corporate Research, TSMC

  • Choon Lee, SVP, GM of ATTD, Intel Corporation

  • Elif Balkas,, Chief Technology Officer, Wolfspeed

  • Shankar Venkataraman, Vice President and General Manager, Semiconductor Products Group, Applied Materials, Inc

IRPS 2024 Keynote Speakers

  • Shinichi Takagi, Professor, The University of Tokyo (Japan)

  • Su Jin Ahn, EVP, Advanced Technology Development Office at Samsung Semiconductor R&D Center, Samsung

  • Rajeev Malik, Program Director, Systems Development & Deployment, IBM Quantum

  • Sameer Pendharkar, Vice President of Advanced Technology Development, Texas Instruments

IRPS 2023 Keynote Speakers

IRPS 2022 Keynote Speakers

IRPS 2021 Keynote Speakers