IRPS Year-in-Review
Inside Program: Conference Program l Keynote Speakers l Tutorials
Workshops l Year in Review l Highlighted Papers | Invited Speakers
The IRPS Reliability Year-in-Review (YiR) session consists of 3 presentations reviewing the past year's reliability work by experts in the field for areas of high interest. It is an excellent augmentation to the tutorial sessions immediately preceding, and attendees may obtain keen reliability insights in a short amount of time.
Speakers
YiR1: Reliability Challenges in Memory IP: Trends Across Multiple Technologies: Tanya Nigam and Yao Fang, OnSemi
YiR2: Complex Challenges of Backend-of-Line (BEOL) and Middle-of-Line (MOL) Time-Dependent Dielectric Breakdown in Advanced Nodes: Andrew Kim, Sandia
YiR3: Terrestrial and Space Radiation Effects in Artificial Neural Networks: Daniel Loveless, Indiana University
(YiR1) 23rd March 3:00 PM - 3:50 PM
Reliability Challenges in Memory IP: Trends Across Multiple Technologies
Tanya Nigam and Yao Fang (onsemi)
Abstract: Comprehensive YIR of Reliability Challenges in Memory IP highlighting the current trends and requirements for HPC, mobile and automotive needs. The review will span a wide range of memory types—including SRAM, ROM, OTP, RRAM, MRAM, and PCM—as each memory type contributes uniquely to different applications. The review will also highlight integration challenges, qualification standards, DFT approaches and the growing importance of non-volatile and emerging memory solutions both as standalone & embedded offering.
Tanya Nigam Tanya Nigam is Sr Principal Technical Leader at Onsemi. Prior to that she was a Fellow at GlobalFoundries. She obtained her PHD from KU LEUVEN in 1999 in the area of ultra-thin gate oxide breakdown while conducting research at IMEC. Since then, she has worked on various challenges (TDDB, HCI, BTI) in the area of device reliability for CMOS devices, LDMOS devices and correlation of device level reliability to product reliability. She continues to focus on device to product correlation for different failure modes and screening defects in SRAM, 3rd party IP and CPU/Automotive/Mobile products. She has worked at Bell labs, Agere Systems, Cypress Semi and AMD. She has co-authored 100+ papers in Journals and Conferences and holds 10+ patents.
Yao-Feng Chang, Ph.D., is a Senior Principal Reliability Engineer at onsemi with over 15 years of experience in AI hardware reliability, NVM IP development, and yield-aware qualification. He has led reliability strategies for ReRAM, PUF, eFuse, and anti-fuse technologies across advanced SoC platforms, enabling robust fault coverage and mission-profile resilience from Intel Meteor Lake to Panther Lake. Dr. Chang holds 16 U.S. patents and has authored over 100 technical publications. His work bridges device physics, system-level reliability, and cross-functional enablement, driving innovation in yield optimization and reliability-aware design for next-generation semiconductor products.
(YiR2) 23rd March 3:50 PM - 4:40 PM
Complex Challenges of Backend-of-Line (BEOL) and Middle-of-Line (MOL) Time-Dependent Dielectric Breakdown in Advanced Nodes
Andrew Kim (Sandia National Laboratories)
Abstract: A reliability risk of BEOL and MOL TDDB has only been increasing as technology node advances with new materials and aggressively scaled thickness of insulators. Complex Challenges of accurately assessing BEOL and MOL of inherently non-planar geometry devices have also increased in terms of both testing and data analysis. This review covers challenges facing in BEOL and MOL TDDB assessments and recent efforts to overcome difficulties of testing and modeling data more accurately.
(YiR3) 23rd March 4:40 PM - 5:50 PM
Terrestrial and Space Radiation Effects in Artificial Neural Networks
Daniel Loveless (Indiana University)
Abstract: Neural networks are increasingly being deployed in safety-critical applications, including in radiation environments where soft errors can perturb model parameters and decrease reliability. However, evaluating reliability is exceptionally challenging due to the complexity of the software and its instantiation on specific hardware platforms. This presentation explores the algorithmic sensitivity of neural networks, suggesting that the manifestation of soft errors depends on model architecture, dataset composition, and specific model selection. As a result, many recent studies have focused on developing fault analysis frameworks and guidelines for deploying reliable solutions. These works will be summarized, establishing a hardware-agnostic baseline for test planning and reducing the risk of underestimating device robustness during radiation testing, often limited to a single network or unbalanced imagery.
Daniel Loveless Director, IU Center for Reliable and Trusted Electronics (CREATE) Associate Professor Intelligent Systems Engineering Luddy School of Informatics, Computing, and Engineering Dr. Daniel Loveless is an Associate Professor of Intelligent Systems Engineering at Indiana University and the Director of the IU Center for Reliable and Trusted Electronics (IU CREATE). Dr. Loveless received a B.S. in Electrical Engineering from the Georgia Institute of Technology in 2004 and an M.S. and Ph.D. in Electrical Engineering from Vanderbilt University in 2007 and 2009, respectively. Before joining Indiana University, Dr. Loveless served as a Guerry Professor of Electrical Engineering at the University of Tennessee at Chattanooga from 2014 to 2023 and as a Senior Engineer and Research Assistant Professor at Vanderbilt University's Institute for Space and Defense Electronics from 2009 to 2014.
Dr. Loveless's research encompasses radiation effects and reliability in electronic and photonic integrated circuits, as well as high-performance and radiation-hardened integrated circuit design, embedded systems, FPGAs, microprocessors, microcontrollers, systems-on-chip, neural networks, and CubeSat design. Dr. Loveless has published over 120 peer-reviewed journal articles and is a Senior Member of IEEE and an Associate Editor for the IEEE Transactions on Nuclear Science. Honors include the 2019 NPSS Radiation Effects Early Achievement Award, five best conference paper awards, and the IEEE NPSS Graduate Scholarship Award.
Archives
IRPS 2025 Year in Review
YiR1: Gate-All-Around Devices: Zakariae Chbili, Intel
YiR2: 2D Materials: Baozhen Li, IBM
YiR3: Advanced Packaging Technology Breakthrough to Drive AI/HPC Innovation: Mirng-Ji Lii, TSMC
IRPS 2024 Year in Review
YiR1: Neuromorphic: Brian Hoskins, NIST
YiR2: Dielectrics: Bonnie Weir, Broadcom
YiR3: GaN: Srabanti Chowdfury, Stanford Univ.
IRPS 2023 Year in Review
Soft Error in Planar, FDSOI, FinFET, and GAA by Taiki Uemura (Samsung Electronics)
SiC Devices by Daniel J. Lichtenwalner (Wolfspeed, A Cree Company)
FEOL reliability of fin, NW, NS FETs by Stanislav Tyaginov, Michiel Vandemaele, Erik Bury (imec)
IRPS 2022 Year in Review
3D IC Packaging by Kangwook (Kriss) Lee, (SK Hynix)
Emerging Memory Reliability (MRAM, RRAM, PCM, Ferroelectrics) by Shimeng Yu, (Georgia Tech)
Reliability and aging aware designs / Circuit reliability by Evelyn Landman, (Protean Tecs)
IRPS 2021 Year in Review
FinFET vs GAA : Main reliability Differences and Concerns by Adrian Chasin (imec)
Reliability Testing: Considerations for Physics-Based Reliability Testing Development by Derek W. Slottke (Intel)
Industry Council on ESD Target Levels: Review of Achievements, Activities, and Initiatives by Charvaka Duvvury (ESD consulting)

