Workshops


Workshop WS1: Reliability Challenges of Emerging Transistor Architectures and Materials Beyond Traditional Logic Scaling

Moderators: Hitoshi Wakabayashi, Institute of Science Tokyo - Miaomiao Wan, IBM


Workshop WS2: Advanced Packaging to Meet Reliability Challenges in Diverse Applications

Moderators: Sherwin Tang, TSMC - Pitamber Shukla, Microchip


Workshop WS3: Ensuring Reliability of Large-Scale Data Centers: An Integrated Approach from Facility, Systems to Architecture and Device Level

Moderators: Takahide Yoshikawa, Fujitsu - Chundong Liang, AWS - Sriram Kalpat, Qualcomm


Workshop WS4: Emerging Memory ,Post-CMOS logic, Non-volatile Memory, Novel Interconnects, Edge Computing, Edge AI, Error Mitigation Techniques, Beyond Moore

Moderators: Matt Marinella, Arizona State University - Chris Bennett, Sandia Lab


Workshop WS5: Wide-Bandgap Reliability Challenges: Modeling SiC and GaN Device

Moderators: Matteo Meneghini, Padova University - Peter Moens, onsemi