2021 IRPS Reliability Year in Review

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View the Full 2021 Program for Year in Review Abstracts (begins on page 21).

YIR1 (Year-in-Review) – FinFET vs GAA : Main reliability Differences and Concerns l Presented by Adrian Chasin (imec)

ABSTRACT

FinFET devices have reigned in the last decade, allowing continuous scaling of silicon devices since first Intel adoption in the 22nm node up to the 5nm products recently released by TSMC. The adoption of a more advanced architecture that can provide even better channel control and, therefore, allowing further scaling seems unavoidable. Gate-All-Around (GAA) devices were proposed as a natural follower and has been the focus of intensive research in the last years. Following a brief overview of the claimed performance advantages of such architecture, we will review the most recent reliability studies of this new device and how it compares to FinFETs. In particular, we will focus on new inherent features of this new technology and how they can impact the overall device reliability.

YIR2 (Year-in-Review) – Reliability Testing: Considerations for Physics-Based Reliability Testing Development l Presented by Derek W. Slottke (Intel)

ABSTRACT

Deviation from previous dependence on scaling based strategies of existing process technologies, the development of more diverse products, and pressures to minimize reliability margins are driving the need for a greater variation in available test capabilities. I hope to cover the considerations for volume reliability testing, challenges and trends, as well as some specific topics of personal interest where I believe substantial novel work should be done.

YIR3 (Year-in-Review) – Industry Council on ESD Target Levels: Review of Achievements, Activities, and Initiatives l Presented by Charvaka Duvvury (ESD Consulting) – in cooperation with IEW

ABSTRACT

The Industry Council on ESD Target Levels has been recommending realistic specifications for ESD to be compatible with high-speed circuit performance. This review will cover the key accomplishments of the Council that changed the industry qualification processes for ESD reliability. Also, an overview of the myriad of root causes that lead electrical overstress (EOS) damage and the notion of Absolute Maximum Rating (AMR) as it relates to probability of EOS during applications will be discussed.